The third factor in the performance model is the processor cycle time . This is usually in the realm of computer engineering: a better layout of the components on the surface of the chip might shorten wire lengths and allow for a faster clock, or a different material (e.g. gallium arsenide vs. silicon based semiconductors) might have a faster switching time. However, the architecture can also affect cycle time. One of the reasons RISC is such a good fit for current VLSI technology is that if the instruction set is small, it requires less logic to implement. Less logic means less space on the chip, and smaller circuits run faster and consume less power . Thus the design of the instruction set, the organization of pipelines, and other attributes of the architecture and its implementation can impact cycle time.
Figure 3: Pipelined execution.