next up previous

Exercise 17: A determination of the processor-memory connections for a butterfly switch arrangement.

For each interior node in the butterfly switch of figure Figure 15, indicate whether it is in the straight- through or flipped configuration for the following pairs of processor-memory connections. Assume the connections that come first in the list are made first by the switching network:

P0- M3, P1-M5, P2-M2, P3-M7, P4-M6, P5-M0, P6-M4, P7-M1

How many of these connections block due to contention in the switch?