A major consideration in the design of parallel
systems is the set of pathways over which the processors,
memories, and switches communicate with each other. These
connections define the * interconnection network*, or * topology*,
of the machine. Attributes of the topology determine how processors
will share data and at what cost.

Figure 10: Ring vs. Fully Connected Network.

The following discussion of the properties of interconnection networks is based on a collection of nodes that communicate via links. In an actual system the nodes can be either processors, memories, or switches. Unless otherwise noted the links will always be point-to-point data paths, i.e. not buses that are shared by several nodes. The properties discussed here apply equally to MIMD and SIMD machines, or to shared memory or distributed memory architectures. Examples of most of the topologies will be given in the survey of high performance systems (Section 3.5).

Two
nodes are * neighbors* if there is a link connecting them. The
* degree* of a node is defined to be the number of its neighbors.
Figure 10
shows two common topologies, a ring and a fully
connected network, each with eight nodes. Each node in the ring
is connected to only two other nodes, while each node in the
fully connected network is linked to every other node. In
practice the degree of a topology has an effect on cost, since
the more links a node has the more logic it takes to implement
the connections.